[PATCH] D144927: [GVNHoist] skip hoisting into blocks terminated by callbr

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers updated this revision to Diff 500950.
nickdesaulniers added a comment.

- hoist (lol) "is terminator a callbr" check into GVNHoist::findHoistableCandidates


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144927/new/

https://reviews.llvm.org/D144927

Files:
  llvm/lib/Transforms/Scalar/GVNHoist.cpp
  llvm/test/Transforms/GVNHoist/hoist-call.ll


Index: llvm/test/Transforms/GVNHoist/hoist-call.ll
===================================================================
--- llvm/test/Transforms/GVNHoist/hoist-call.ll
+++ llvm/test/Transforms/GVNHoist/hoist-call.ll
@@ -26,3 +26,24 @@
 }
 
 declare float @llvm.fabs.f32(float)
+
+; Check that extractvalues are not hoisted into entry.
+define void @foo() {
+; CHECK-LABEL: define void @foo(
+; CHECK-NEXT: entry
+; CHECK-NEXT: %0 = callbr
+; CHECK-NEXT: to label
+; CHECK-EMPTY:
+; CHECK-NEXT: asm.fallthrough:
+entry:
+  %0 = callbr { i32, i32 } asm sideeffect "somestuff", "=r,=r,!i"()
+          to label %asm.fallthrough [label %err.split]
+
+asm.fallthrough:                                  ; preds = %entry
+  %asmresult = extractvalue { i32, i32 } %0, 0
+  ret void
+
+err.split:                                        ; preds = %entry
+  %asmresult2 = extractvalue { i32, i32 } %0, 0
+  ret void
+}
Index: llvm/lib/Transforms/Scalar/GVNHoist.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/GVNHoist.cpp
+++ llvm/lib/Transforms/Scalar/GVNHoist.cpp
@@ -883,12 +883,15 @@
   // accumulate hoistable candidates in HPL.
   for (std::pair<BasicBlock *, SmallVector<CHIArg, 2>> &A : CHIBBs) {
     BasicBlock *BB = A.first;
+    auto TI = BB->getTerminator();
+    // Don't hoist into CallBr terminated blocks.
+    if (isa<CallBrInst>(TI))
+      continue;
     SmallVectorImpl<CHIArg> &CHIs = A.second;
     // Vector of PHIs contains PHIs for different instructions.
     // Sort the args according to their VNs, such that identical
     // instructions are together.
     llvm::stable_sort(CHIs, cmpVN);
-    auto TI = BB->getTerminator();
     auto B = CHIs.begin();
     // [PreIt, PHIIt) form a range of CHIs which have identical VNs.
     auto PHIIt = llvm::find_if(CHIs, [B](CHIArg &A) { return A != *B; });


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