[PATCH] D144907: [RegAllocFast] insert additional spills along indirect edges of INLINEASM_BR
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 27 15:37:45 PST 2023
MatzeB added inline comments.
================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:952
+
+ if (MI.getOpcode() == TargetOpcode::INLINEASM_BR) {
+ int FI = StackSlotForVirtReg[VirtReg];
----------------
May be good to add a comment here to remind readers that we have the really unusual behavior of possibly jumping in the middle of a basic block.
================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:952-963
+ if (MI.getOpcode() == TargetOpcode::INLINEASM_BR) {
+ int FI = StackSlotForVirtReg[VirtReg];
+ const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg);
+ for (MachineBasicBlock *Succ : MI.getParent()->successors()) {
+ if (Succ->isInlineAsmBrIndirectTarget()) {
+ TII->storeRegToStackSlot(*Succ, Succ->begin(), PhysReg, Kill,
+ FI, &RC, TRI, VirtReg);
----------------
MatzeB wrote:
> May be good to add a comment here to remind readers that we have the really unusual behavior of possibly jumping in the middle of a basic block.
Would it be possible to move this code block into the `spill()` function. To me it feels like it's just part of the spilling process. You could add a new parameter to pass along `MI` or a `bool MayJump`...
================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:956
+ for (MachineBasicBlock *Succ : MI.getParent()->successors()) {
+ if (Succ->isInlineAsmBrIndirectTarget()) {
+ TII->storeRegToStackSlot(*Succ, Succ->begin(), PhysReg, Kill,
----------------
Just wondering: Can there be multiple INLINEASM_BR within the same block where you would need a check to only deal with the successors of the current INLINEASM_BR?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144907/new/
https://reviews.llvm.org/D144907
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