[PATCH] D144893: [OpenMP][WIP] `spir64` device runtime library template

Johannes Doerfert via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 27 11:20:29 PST 2023


jdoerfert added inline comments.


================
Comment at: openmp/libomptarget/DeviceRTL/src/State.cpp:69-86
+/// Intel implementations of the shuffle sync idiom.
+///
+///{
+#pragma omp begin declare variant match(device = {arch(spir64)})
+
+extern "C" {
+void *malloc(uint64_t Size) {
----------------
spoutn1k wrote:
> This is only defined for AMDGCN with a TODO, in a way that seems to overwrite the default `malloc`. Should I do the same for this implementation ?
On AMDGPU there is no "default malloc". On NVPTX there is, on Intel we need to check. You can probably go with the AMD route for now.


================
Comment at: openmp/libomptarget/DeviceRTL/src/Utils.cpp:87-91
+void Unpack(uint64_t Val, uint32_t *LowBits, uint32_t *HighBits) {
+  // TODO
+}
+
+uint64_t Pack(uint32_t LowBits, uint32_t HighBits) { return 0; }
----------------
spoutn1k wrote:
> Found `shuffle` below in the spirv interface but not pack. Should I start using bitwise operation the way it is done for AMD ?
There is a default implementation for Pack and Unpack, you can just not overwrite them. I think that is what we do for AMD.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144893/new/

https://reviews.llvm.org/D144893



More information about the llvm-commits mailing list