[PATCH] D130487: [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types.
Kamau Bridgeman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 27 10:27:47 PST 2023
kamaub added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15088
+ LHS.getValueType().getScalarSizeInBits();
+ int LHSScalarSize = SToVLHS.getValueType().getScalarSizeInBits();
+ LHSLastElt = LHSScalarSize / (ShuffleEltWidth + 1);
----------------
nemanjai wrote:
> I think we should have an early exit here if the valid lane width is zero:
> ```
> if (LHSValidLaneWidth == 0)
> return false;
> ```
> Since it is not really reasonable to do this transform if we are pulling in more bits than the original `scalar_to_vector` actually defined. Similarly with the RHS below.
move `LHSScalarSize` up and use it in this block
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15100
+ RHS.getValueType().getScalarSizeInBits();
+ int RHSScalarSize = SToVRHS.getValueType().getScalarSizeInBits();
+ RHSLastElt = RHSScalarSize / (ShuffleEltWidth + 1) + RHSFirstElt;
----------------
Same here, please raise `RHSScalarSize` and reuse it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130487/new/
https://reviews.llvm.org/D130487
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