[llvm] 80ddb9c - [RISCV] Combine some duplicate XTHeadFMemIdx patterns. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-02-25T00:18:44-08:00
New Revision: 80ddb9c2a79d3472a9b137697bd6daea06e77cc5

URL: https://github.com/llvm/llvm-project/commit/80ddb9c2a79d3472a9b137697bd6daea06e77cc5
DIFF: https://github.com/llvm/llvm-project/commit/80ddb9c2a79d3472a9b137697bd6daea06e77cc5.diff

LOG: [RISCV] Combine some duplicate XTHeadFMemIdx patterns. NFC

We had identical patterns for TH_FLRW, TH_FSRW, TH_FLRD, and TH_FSRD
under both IsRV32 and IsRV64.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
index 448ec9cc30dfe..24b0ce8ddad58 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
@@ -834,27 +834,23 @@ defm : StIdxPat<store, TH_SRD, GPR>;
 defm : StZextIdxPat<store, TH_SURD, GPR>;
 }
 
-let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtF, IsRV32] in {
+let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtF] in {
 defm : LdIdxPat<load, TH_FLRW, f32>;
 defm : StIdxPat<store, TH_FSRW, FPR32, f32>;
 }
 
-let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtD, IsRV32] in {
+let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtD] in {
 defm : LdIdxPat<load, TH_FLRD, f64>;
 defm : StIdxPat<store, TH_FSRD, FPR64, f64>;
 }
 
 let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtF, IsRV64] in {
-defm : LdIdxPat<load, TH_FLRW, f32>;
 defm : LdZextIdxPat<load, TH_FLURW, f32>;
-defm : StIdxPat<store, TH_FSRW, FPR32, f32>;
 defm : StZextIdxPat<store, TH_FSURW, FPR32, f32>;
 }
 
 let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtD, IsRV64] in {
-defm : LdIdxPat<load, TH_FLRD, f64>;
 defm : LdZextIdxPat<load, TH_FLURD, f64>;
-defm : StIdxPat<store, TH_FSRD, FPR64, f64>;
 defm : StZextIdxPat<store, TH_FSURD, FPR64, f64>;
 }