[PATCH] D144776: [X86][MC] Early bail out in emitREXPrefix, NFCI

[Kan Shengchen via Phabricator via llvm-commits]

skan created this revision.
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1. Not enter into the switch when there is no register operand
2. Add a default (unreachable) label in the switch


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D144776

Files:
  llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp


Index: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
===================================================================
--- llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1160,7 +1160,6 @@
   if (!STI.hasFeature(X86::Is64Bit))
     return None;
   X86OpcodePrefixHelper Prefix(*Ctx.getRegisterInfo());
-  bool UsesHighByteReg = false;
   const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
   uint64_t TSFlags = Desc.TSFlags;
   Prefix.setW(TSFlags & X86II::REX_W);
@@ -1170,10 +1169,14 @@
     Prefix.emit(OS);
     return Kind;
   }
+
+  bool UsesHighByteReg = false;
+  bool HasRegOp = false;
   unsigned CurOp = X86II::getOperandBias(Desc);
   for (unsigned i = CurOp; i != NumOps; ++i) {
     const MCOperand &MO = MI.getOperand(i);
     if (MO.isReg()) {
+      HasRegOp = true;
       unsigned Reg = MO.getReg();
       if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH)
         UsesHighByteReg = true;
@@ -1193,7 +1196,19 @@
       }
     }
   }
+  if (!HasRegOp) {
+    PrefixKind Kind = Prefix.determineOptimalKind();
+    Prefix.emit(OS);
+    return Kind;
+  }
   switch (TSFlags & X86II::FormMask) {
+  default:
+    llvm_unreachable("Unexpected form in emitREXPrefix!");
+  case X86II::RawFrmMemOffs:
+  case X86II::RawFrmSrc:
+  case X86II::RawFrmDst:
+  case X86II::RawFrmDstSrc:
+    break;
   case X86II::AddRegFrm:
     Prefix.setB(MI, CurOp++);
     break;


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