[PATCH] D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


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Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1731
+    //
+    // TODO: Handle demand of an arbitrary single element or more than one
+    //       element instead of just element 0.
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This also would work for unary operator? I.e you have `Unary(X)` and `Unary(Shuf(X))`?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144760/new/

https://reviews.llvm.org/D144760