[PATCH] D144729: [AMDGPU] Select v_sat_pk_u8_i16

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructions.td:297
+  [
+    (i16 (smax (smin $src, (i16 255)), (i16 0))),
+    (i16 (AMDGPUsmed3 $src, (i16 0), (i16 255)))
----------------
Do you also need to match them the other way round: `(smin (smax $src, (i16 0)), (i16 255))`?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2929
 
+multiclass V_SAT_PK_Pat<Instruction inst> { 
+  def: GCNPat<
----------------
Probably should not generate any VALU instructions without a Divergent*Frag check.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144729/new/

https://reviews.llvm.org/D144729