[PATCH] D144715: [AMDGPU] Use `S_BFE_U64` for uniform i1-i64 ext

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/saddo.ll:34
-; SI-NEXT:    v_mov_b32_e32 v1, s11
-; SI-NEXT:    v_add_i32_e32 v0, vcc, s10, v0
-; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
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This looks like we could avoid the v_cndmask_b32_e64 if we used v_addc with the carry input coming from s[4:5]


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D144715/new/

https://reviews.llvm.org/D144715