[lld] 4f0aa25 - [lld][RISCV] Introduce handling for R_RISCV_PLT32 relocation

Leonard Chan via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 23 14:06:10 PST 2023


Author: Leonard Chan
Date: 2023-02-23T22:05:52Z
New Revision: 4f0aa2517d0cef0422cca03667f572b935f062fb

URL: https://github.com/llvm/llvm-project/commit/4f0aa2517d0cef0422cca03667f572b935f062fb
DIFF: https://github.com/llvm/llvm-project/commit/4f0aa2517d0cef0422cca03667f572b935f062fb.diff

LOG: [lld][RISCV] Introduce handling for R_RISCV_PLT32 relocation

This introduces R_RISCV_PLT32, a PC-relative data relocation that takes
the 32-bit relative offset to a function or its PLT entry.

This is needed to support relative vtables on RISCV.

Github PR: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/363

D143226 has the llvm parts.

Differential Revision: https://reviews.llvm.org/D143115

Added: 
    lld/test/ELF/riscv-reloc-plt32.s

Modified: 
    lld/ELF/Arch/RISCV.cpp
    lld/ELF/InputSection.cpp
    lld/test/ELF/riscv-undefined-weak.s

Removed: 
    


################################################################################
diff  --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 6c478ad4109b2..ff3f82adc72b4 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -280,6 +280,7 @@ RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
     return R_PC;
   case R_RISCV_CALL:
   case R_RISCV_CALL_PLT:
+  case R_RISCV_PLT32:
     return R_PLT_PC;
   case R_RISCV_GOT_HI20:
     return R_GOT_PC;
@@ -473,6 +474,7 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
     return;
   case R_RISCV_SET32:
   case R_RISCV_32_PCREL:
+  case R_RISCV_PLT32:
     write32le(loc, val);
     return;
 

diff  --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index 879129db335b1..2db644c190a2f 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -517,6 +517,7 @@ static uint64_t getRISCVUndefinedRelativeWeakVA(uint64_t type, uint64_t p) {
   case R_RISCV_CALL_PLT:
   case R_RISCV_RVC_BRANCH:
   case R_RISCV_RVC_JUMP:
+  case R_RISCV_PLT32:
     return p;
   default:
     return 0;

diff  --git a/lld/test/ELF/riscv-reloc-plt32.s b/lld/test/ELF/riscv-reloc-plt32.s
new file mode 100644
index 0000000000000..39cd29553e976
--- /dev/null
+++ b/lld/test/ELF/riscv-reloc-plt32.s
@@ -0,0 +1,21 @@
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %S/Inputs/abs256.s -o %t256.o
+#
+# RUN: ld.lld -z max-page-size=4096 %t.o %t256.o -o %t
+# RUN: llvm-objdump -s --section=.data %t | FileCheck %s
+#
+# CHECK: Contents of section .data:
+## 12158: S = 0x100, A = 0, P = 0x12158
+##        S + A - P = 0xfffedfa8
+## 1215c: S = 0x100, A = 1, P = 0x1215c
+##        S + A - P = 0xfffedfa5
+## 12160: S = 0x100, A = -1, P = 0x12160
+##        S + A - P = 0xfffedf9f
+# CHECK-NEXT: 12158 a8dffeff a5dffeff 9fdffeff
+
+.globl _start
+_start:
+.data
+  .word foo at PLT - .
+  .word foo at PLT - . + 1
+  .word foo at PLT - . - 1

diff  --git a/lld/test/ELF/riscv-undefined-weak.s b/lld/test/ELF/riscv-undefined-weak.s
index 9220fbec1a453..457b7dc45ad4e 100644
--- a/lld/test/ELF/riscv-undefined-weak.s
+++ b/lld/test/ELF/riscv-undefined-weak.s
@@ -4,11 +4,11 @@
 
 # RUN: ld.lld -e absolute %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=CHECK,PC %s
-# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX %s
+# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX,HEX-WITHOUT-PLT %s
 
 # RUN: ld.lld -e absolute %t.o -o %t --export-dynamic
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=CHECK,PLT %s
-# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX %s
+# RUN: llvm-readelf -x .data %t | FileCheck --check-prefixes=HEX,HEX-WITH-PLT %s
 
 .weak target
 .global absolute, relative, branch
@@ -75,8 +75,22 @@ branch:
 ## Absolute relocations are resolved to 0.
 # RELOC:      0x0 R_RISCV_64 target 0x3
 # RELOC-NEXT: 0x8 R_RISCV_32 target 0x4
+# RELOC-NEXT: 0xC R_RISCV_PLT32 target 0x0
+
 # HEX:      section '.data':
 # HEX-NEXT: 03000000 00000000 04000000
+# HEX-WITHOUT-PLT-SAME: 00000000
+
+## A plt entry is created for target, so this is the offset between the
+## plt entry and this address.
+##
+##   S = 0x11360 (the address of the plt entry for target)
+##   A = 0
+##   P = 0x1343c (the address of `.`)
+##
+##   S - A + P = -0x0x20dc = 0xffffdf24
+# HEX-WITH-PLT-SAME: 24dfffff
+
 .data
 .p2align 3
 .quad target+3
@@ -84,3 +98,5 @@ branch:
 
 # PC-NOT:      .plt:
 # PLT:         .plt:
+
+.word target at plt - .


        


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