[PATCH] D136861: [IR] Add LLVM IR support for target("aarch64.svcount") type.

[Nikita Popov via Phabricator via llvm-commits]

nikic accepted this revision.
nikic added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: StephenFan.

LGTM from IR perspective. I assume this already has internal consensus on the ARM side.



================
Comment at: llvm/docs/AArch64SME.rst:462
+* The supported LLVM operations on this type are limited to ``load``, ``store``,
+  ``phi`` and ``alloca`` instructions.
+
----------------
Probably select as well,


================
Comment at: llvm/lib/IR/Type.cpp:871
+  // Opaque types in the AArch64 name space.
+  if (Name.startswith("aarch64.")) {
+    if (Name == "aarch64.svcount")
----------------
Could drop the outer check while there is only one type...


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D136861/new/

https://reviews.llvm.org/D136861