[PATCH] D144451: [X86] Optimize umax(X,1)

Wed Feb 22 07:53:06 PST 2023

spatel added a comment.

In D144451#4142962 <https://reviews.llvm.org/D144451#4142962>, @RKSimon wrote:

> Incidently, I'm guessing the vector equivalent code will be pretty poor as well when a umax op isn't available (v2i64 pre-AVX512 etc).

Yes, I posted an example of that in https://github.com/llvm/llvm-project/issues/60374 :
https://alive2.llvm.org/ce/z/didmjC

If there's no legal/custom umax, we probably want to convert to setcc + add. Once that's done, we can take another step to canonicalize the IR icmp+zext+add sequence to umax.
There's a sibling pattern with umin:
https://alive2.llvm.org/ce/z/cXL_d9
...and related signed patterns too.

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