[PATCH] D144034: [AMDGPU][GFX11] Legalize and select partial NSA MIMG instructions
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 22 07:07:42 PST 2023
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:6496
MVT GradPackVectorVT = VAddrScalarVT == MVT::f16 ? MVT::v2f16 : MVT::v2i16;
- IsG16 = VAddrScalarVT == MVT::f16 || VAddrScalarVT == MVT::i16;
+ IsG16 = BaseOpcode->Gradients &&
+ (VAddrScalarVT == MVT::f16 || VAddrScalarVT == MVT::i16);
----------------
How is this change related?
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:6598
+ if (UsePartialNSA)
+ VAddr = getBuildDwordsVector(DAG, DL, VAddrs, NSAMaxSize - 1);
+ else if (!UseNSA)
----------------
I think it would be simpler overall to call `getBuildDwordsVector(DAG, DL, ArrayRef(VAddrs).drop_front(NSAMaxSize - 1))` here, instead of adding another argument to `getBuildDwordsVector`.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:6670
+ ArrayRef<SDValue> NSAPart(VAddrs);
+ append_range(Ops, NSAPart.take_front(NSAMaxSize - 1));
+ Ops.push_back(VAddr);
----------------
Can you write `append_range(Ops, ArrayRef(VAddrs).take_front(NSAMaxSize - 1))`?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144034/new/
https://reviews.llvm.org/D144034
More information about the llvm-commits
mailing list