[PATCH] D144439: [X86] Disable base pointer register when it is clobbered.

LuoYuanke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 22 00:54:36 PST 2023


LuoYuanke added inline comments.


================
Comment at: llvm/test/CodeGen/X86/i386-baseptr.ll:64
   %k = call i32 @helper()
   %a = alloca i32, align 128
   %b = alloca i32, i32 %k, align 4
----------------
LuoYuanke wrote:
> pengfei wrote:
> > LuoYuanke wrote:
> > > LuoYuanke wrote:
> > > > LuoYuanke wrote:
> > > > > craig.topper wrote:
> > > > > > Are we not satisfying the alignment for this alloca now?
> > > > > From the test case, it seems satisfy, but I'm not quite sure about it.
> > > > Read it again, it does not satisfy the alignment for this alloca now.
> > > It seems difficult to satisfy both alignment and "base pointer register" clobber. Maybe user has to change the inline assembly to save/restore "esi" by him/herself. Should we report warning in assembly to indicate user that "esi" is reserved by compiler?
> > Can we alloc a stack slot to spill/reload "esi" around inline asm?
> The spill reload instruction may be hoisted or sunk, it doesn't always glue to inline asm instruction.
I follow Phoebe's idea to create another patch (https://reviews.llvm.org/D144541) for the fix.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144439/new/

https://reviews.llvm.org/D144439



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