[PATCH] D144530: Support assembler and dis-assembler for VCIX extension.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 21 20:10:48 PST 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrFormatsV.td:127
+class RVInstVCCustom2<bits<4> funct6_hi4, bits<3> funct3, dag outs, dag ins,
+ string opcodestr, string argstr>
----------------
Move this to RISCVInstrInfoXsf.td
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXsf.td:101
+
+let Predicates = [HasVendorXsfvcp], mayLoad = 0, mayStore = 0,
+ hasSideEffects = 1, hasNoSchedulingInfo = 1 in {
----------------
We need to use `DecoderNamespace` on these and update RISCVDisassembler to lookup the VCIX table when the extension is enabled. See the other vendor instruction for examples.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144530/new/
https://reviews.llvm.org/D144530
More information about the llvm-commits
mailing list