[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics
Luke Lau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 21 16:52:18 PST 2023
luke marked 2 inline comments as done.
luke added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6703
+
+ SDValue VLMAX = DAG.getNode(
+ ISD::VSCALE, DL, XLenVT,
----------------
craig.topper wrote:
> craig.topper wrote:
> > luke wrote:
> > > reames wrote:
> > > > See newly added computeVLMax.
> > > It looks like `computeVLMAX` computes the maximum VLMAX statically, not the actual VLMAX on the current hardware.
> > > Although there's a bunch of other places where VLMAX is computed.
> > > Maybe we can rename `computeVLMAX` to `computeMaxVLMAX`, and then add a helper function `getVLMAX`
> > It's using ISD::VSCALE which will be expanded to something like `csrr a0, vlenb; srli a0, 3`. We define "vscale" as vlen/64. vlenb is already in bytes so we divide by with a shift.
> Oops that should have said "We define "vscale" as vlen/64. vlenb is already in bytes so we divide by another 8 with a shift right by 3."
My bad, I didn't realise how new it actually was and hadn't pulled in 9168c98553ac9a1f8e8b87006f9b1b3f23955beb, I thought you were referring to `RISCVTargetLowering::computeVLMAX`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144092/new/
https://reviews.llvm.org/D144092
More information about the llvm-commits
mailing list