[PATCH] D144092: [RISCV] Lower interleave and deinterleave intrinsics

Luke Lau via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 21 02:38:01 PST 2023


luke added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6552
+  if (VecVT.getScalarSizeInBits() < Subtarget.getELEN()) {
+    // Bitcast the concatenated vector from <n x m x ty> -> <n x m / 2 x ty * 2>
+    // This is also casts FPs to ints
----------------
reames wrote:
> This case looks to be missing from the fixed length lowering, we should find a way to pick it up there as well.  
I think this is handled in `lowerVECTOR_SHUFFLEAsVNSRL`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144092/new/

https://reviews.llvm.org/D144092



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