[PATCH] D140460: [RISCV][MC] Add FLI instruction support for the experimental zfa extension
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 21 00:09:09 PST 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:499
+ /// Return true if the operand is a valid fli floating-point immediate.
+ bool isLoadFPImm() const {
+ return Kind == KindTy::FPImmediate &&
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I think to fix the "min" problem for double and half, you need a separate version of this function for fli.h and fli.d so that you can call getLoadFP16Imm and getLoadFP64Imm. To do that you need a different `AsmOperandClass` for each instruction.
================
Comment at: llvm/test/MC/RISCV/zfa-invalid.s:26
+# Invalid floating-point immediate
+# CHECK-NO-RV64: error: expected floating-point constant
+# CHECK-NO-RV32: error: expected floating-point constant
----------------
This error message isn't accurate. You have a floating point constant. It just isn't a valid one.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140460/new/
https://reviews.llvm.org/D140460
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