[PATCH] D144324: [AArch64][SelectionDAG] Perfer CMN for (0 - Y) == Y

[Allen zhong via Phabricator via llvm-commits]

Allen added a comment.

Yes, Agree your idea, thanks @spatel.  I also realize that the **cmn **directive may not exist on all backends? so this is not appropriate.

I try to add a patten match in **performSETCCCombine **, but then it go Into an infinite, so I'm trying to add a codegen pattern for this issue.

  +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  @@ -20436,6 +20436,20 @@ static SDValue performSETCCCombine(SDNode *N,
       }
     }
   
  +  // setcc (shl x, 1), 0, ne ==> setcc (sub 0, x), x, ne for CMN
  +  if (Cond == ISD::SETNE && isNullConstant(RHS) &&
  +      LHS->getOpcode() == ISD::SHL && isa<ConstantSDNode>(LHS->getOperand(1)) &&
  +      LHS->getConstantOperandVal(1) == 1 && LHS->hasOneUse()) {
  +    EVT TstVT = LHS->getValueType(0);
  +    if (TstVT.isScalarInteger() && TstVT.getFixedSizeInBits() <= 64) {
  +      // this pattern will get better opt in emitComparison
  +      SDValue ValX = LHS->getOperand(0);
  +      SDValue TST = DAG.getNode(ISD::SUB, DL, TstVT, DAG.getConstant(0, DL, TstVT),
  +                                ValX);
  +      return DAG.getNode(ISD::SETCC, DL, VT, TST, ValX, N->getOperand(2));
  +    }
  +  }


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  https://reviews.llvm.org/D144324/new/

https://reviews.llvm.org/D144324