[PATCH] D138696: [PowerPC] Exploit test data class instruction for isinf/iszero

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 20 07:32:17 PST 2023


nemanjai requested changes to this revision.
nemanjai added a comment.
This revision now requires changes to proceed.

Actually, now that I've looked over the whole patch, it is not clear to me why this is in the PPC back end? There doesn't seem to be any PPC-specific requirements here. Why is it not OK to put the combine in `DAGCombiner.cpp` and if we don't want the combine to fire on all targets/subtargets, we can just add `TargetLoweringInfo::shouldCombineToIsFPClass()`.

I've requested changes to require that either this be moved to target independent code or a justification be provided as to why this is PPC specific.



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14275
+  } else if (CC == ISD::SETOEQ && Subtarget.hasP9Vector() && !OpVT.isVector()) {
+    bool IsAbsolute = LHS.getOpcode() == ISD::FABS;
+    if (IsAbsolute)
----------------
Nit: name this something like `IsFABS` or `IsAbsVal` (my preference would be the first one).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138696/new/

https://reviews.llvm.org/D138696



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