[PATCH] D143283: [AArch64][SVE]: custom lower AVGFloor/AVGCeil.

Mon Feb 20 04:37:18 PST 2023

hassnaa-arm added inline comments.

================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1034
+
+  if ((ExtOpA.getOpcode() == ISD::ZERO_EXTEND ||
+       ExtOpA.getOpcode() == ISD::SIGN_EXTEND) &&
----------------
sdesmalen wrote:
> This is probably better added as a separate DAGCombine that folds away the sign-extend-in-regs explicitly, because that is already performed by the avgfloor operation.
> 
>   avgfloors(sextinreg(x), sextinreg(y)) -> avgfloors(x, y)
Sorry, I don't understand this comment, may you clarify if more ?
Why did you mention sign-extend-in-regs ? why is it related to this code ?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143283/new/

https://reviews.llvm.org/D143283