[llvm] 3e84fc8 - [LV] Harden the test of the minmax with index pattern. (NFC)

[Mel Chen via llvm-commits]

Author: Mel Chen
Date: 2023-02-20T03:16:28-08:00
New Revision: 3e84fc857f28479cd9574f72efcba7eb8f60d602

URL: https://github.com/llvm/llvm-project/commit/3e84fc857f28479cd9574f72efcba7eb8f60d602
DIFF: https://github.com/llvm/llvm-project/commit/3e84fc857f28479cd9574f72efcba7eb8f60d602.diff

LOG: [LV] Harden the test of the minmax with index pattern. (NFC)

  - Add test config: -force-vector-width=4 -force-vector-interleave=1
  - New test case: The test case both returns the minimum value and the index.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D143905

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/select-min-index.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/select-min-index.ll b/llvm/test/Transforms/LoopVectorize/select-min-index.ll
index 13fde324cb9d1..c4d31f8a93e80 100644
--- a/llvm/test/Transforms/LoopVectorize/select-min-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-min-index.ll
@@ -1,3 +1,4 @@
+; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
 ; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck %s
 ; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck %s
 
@@ -28,6 +29,33 @@ exit:
   ret i64 %res
 }
 
+define i64 @test_vectorize_select_umin_idx_all_exit_inst(ptr %src, ptr %umin) {
+; CHECK-LABEL: @test_vectorize_select_umin_idx_all_exit_inst(
+; CHECK-NOT:   vector.body:
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+  %min.idx = phi i64 [ 0, %entry ], [ %min.idx.next, %loop ]
+  %min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
+  %gep = getelementptr i64, ptr %src, i64 %iv
+  %l = load i64, ptr %gep
+  %cmp = icmp ugt i64 %min.val, %l
+  %min.val.next = tail call i64 @llvm.umin.i64(i64 %min.val, i64 %l)
+  %min.idx.next = select i1 %cmp, i64 %iv, i64 %min.idx
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond.not = icmp eq i64 %iv.next, 0
+  br i1 %exitcond.not, label %exit, label %loop
+
+exit:
+  %res = phi i64 [ %min.idx.next, %loop ]
+  %res.umin = phi i64 [ %min.val.next, %loop ]
+  store i64 %res.umin, ptr %umin
+  ret i64 %res
+}
+
 define i64 @test_vectorize_select_umin_idx_min_ops_switched(ptr %src) {
 ; CHECK-LABEL: @test_vectorize_select_umin_idx_min_ops_switched(
 ; CHECK-NOT:   vector.body: