[PATCH] D142359: [TTI][AArch64] Cost model vector INS instructions

[Kyrill Tkachov via Phabricator via llvm-commits]

ktkachov added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:216-217
     PrefLoopLogAlignment = 5;
     MaxBytesForLoopAlignment = 16;
+    VectorInsertExtractBaseCost = 2;
     break;
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Beyond David's comments I'll note that there are other microarchitectures that are similar to N1 and so should benefit from this. Particularly Cortex-A76 and later CPUs in that family


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  https://reviews.llvm.org/D142359/new/

https://reviews.llvm.org/D142359