[PATCH] D143847: [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension

[Philipp Tomsich via Phabricator via llvm-commits]

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The vendor-defined XTHeadMAC (no comparable standard extension exists
at the time of writing) extension adds multiply accumulate instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1 <https://reviews.llvm.org/D1>) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:

  https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:

  https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=4041e11db3ec3611921d10150572a92689aa3154

Depends on D143439 <https://reviews.llvm.org/D143439>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143847

Files:
  llvm/docs/RISCVUsage.rst
  llvm/docs/ReleaseNotes.rst
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  llvm/lib/Target/RISCV/RISCVFeatures.td
  llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/CodeGen/RISCV/xtheadmac.ll
  llvm/test/MC/RISCV/rv32xtheadmac-invalid.s
  llvm/test/MC/RISCV/rv32xtheadmac-valid.s
  llvm/test/MC/RISCV/rv64xtheadmac-valid.s
  llvm/test/MC/RISCV/xtheadmac-invalid.s

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