[PATCH] D142192: [AMDGPU] Run unmerge combines post regbankselect

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D142192#4117252 <https://reviews.llvm.org/D142192#4117252>, @Pierre-vh wrote:

> In D142192#4115308 <https://reviews.llvm.org/D142192#4115308>, @arsenm wrote:
>
>> Does the instruction matcher try to optimize the case where the class is already VGPR and avoid introducing a new instruction?
>
> It doesn't look like it does at first glance (it just emits 3 BuildMI/AddTempRegister sequence). The copies are very likely folded out later but I'm not sure where

I’m sure they are folded out by PeepholeOpt, but as a compile time optimization we should try to avoid creating unnecessary instructions


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https://reviews.llvm.org/D142192