[PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors
Luke Lau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 10 06:08:47 PST 2023
luke added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:23580
+ Op.getOperand(1));
+ return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(OpVT, OpVT), Even,
+ Odd);
----------------
paulwalker-arm wrote:
> I think `Op->getVTList()` should work here?
Could you use `DAG.getMergeValues` here too?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141924/new/
https://reviews.llvm.org/D141924
More information about the llvm-commits
mailing list