[PATCH] D143731: [AMDGPU] Scalarize some large PHIs for DAGISel

Pierre van Houtryve via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 10 05:23:13 PST 2023


Pierre-vh created this revision.
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DAGISel uses CopyToReg/CopyFromReg to lower PHI nodes. With large, non 2^n sized PHIs this can result in poor codegen.
This is because it introduces a need to have a build_vector before copying the PHI value, and that build_vector may have many undef elements. This can cause very high register pressure and abnormal stack usage in some cases.

This scalarization can be easily tuned/disabled through CL options in case it's not beneficial for some users. It's also only enabled for DAGIsel and GlobalISel handles PHIs much better (as it works on the whole function).

Fixes SWDEV-321581


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143731

Files:
  llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
  llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-scalarize-large-phis.ll
  llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll

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