[PATCH] D143707: [AMDGPU] Allow architected SGPRs for workgroup IDs
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 10 01:45:16 PST 2023
foad added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll:26
+ %idx = call i32 @llvm.amdgcn.workgroup.id.x()
+ store volatile i32 %idx, ptr addrspace(1) %ptrx
+
----------------
Why are all these stores volatile?
================
Comment at: llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll:53
+; GCN-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GCN-GISEL-NEXT: v_mov_b32_e32 v1, ttmp7
+; GCN-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
----------------
Doesn't this value need to be ANDed with 0xffff?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143707/new/
https://reviews.llvm.org/D143707
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