[llvm] 942c4cd - [InstCombine] precommit tests for D140666
Yingchi Long via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 9 20:49:55 PST 2023
Author: Yingchi Long
Date: 2023-02-10T12:48:32+08:00
New Revision: 942c4cdac435530ad7bc85319a6279b7ee07193e
URL: https://github.com/llvm/llvm-project/commit/942c4cdac435530ad7bc85319a6279b7ee07193e
DIFF: https://github.com/llvm/llvm-project/commit/942c4cdac435530ad7bc85319a6279b7ee07193e.diff
LOG: [InstCombine] precommit tests for D140666
Differential Revision: https://reviews.llvm.org/D142090
Added:
Modified:
llvm/test/Transforms/InstCombine/icmp-logical.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/icmp-logical.ll b/llvm/test/Transforms/InstCombine/icmp-logical.ll
index 6f72e97c17ca1..705399e3c31bc 100644
--- a/llvm/test/Transforms/InstCombine/icmp-logical.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-logical.ll
@@ -1743,3 +1743,151 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(
%t5 = select i1 %t4, i1 true, i1 %t2
ret i1 %t5
}
+
+
+define i1 @masked_icmps_bmask_notmixed_or(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_or(
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 3
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 255
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 243
+; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %mask1 = and i32 %A, 15 ; 0x0f
+ %tst1 = icmp eq i32 %mask1, 3 ; 0x03
+ %mask2 = and i32 %A, 255 ; 0xff
+ %tst2 = icmp eq i32 %mask2, 243; 0xf3
+ %res = or i1 %tst1, %tst2
+ ret i1 %res
+}
+
+define <2 x i1> @masked_icmps_bmask_notmixed_or_vec(<2 x i8> %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec(
+; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 3>
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 -13>
+; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT: ret <2 x i1> [[RES]]
+;
+ %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
+ %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 3> ; 0x03
+ %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff
+ %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 243> ; 0xf3
+ %res = or <2 x i1> %tst1, %tst2
+ ret <2 x i1> %res
+}
+
+define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison1(<2 x i8> %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison1(
+; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 poison>
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 -13>
+; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT: ret <2 x i1> [[RES]]
+;
+ %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
+ %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 poison> ; 0x03
+ %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff
+ %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 243> ; 0xf3
+ %res = or <2 x i1> %tst1, %tst2
+ ret <2 x i1> %res
+}
+
+define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison2(<2 x i8> %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison2(
+; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 3>
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 poison>
+; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT: ret <2 x i1> [[RES]]
+;
+ %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
+ %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 3> ; 0x03
+ %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff
+ %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 poison> ; 0xf3
+ %res = or <2 x i1> %tst1, %tst2
+ ret <2 x i1> %res
+}
+
+define i1 @masked_icmps_bmask_notmixed_or_contradict_notoptimized(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_contradict_notoptimized(
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 3
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 255
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 242
+; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %mask1 = and i32 %A, 15 ; 0x0f
+ %tst1 = icmp eq i32 %mask1, 3 ; 0x03
+ %mask2 = and i32 %A, 255 ; 0xff
+ %tst2 = icmp eq i32 %mask2, 242; 0xf2
+ %res = or i1 %tst1, %tst2
+ ret i1 %res
+}
+
+define i1 @masked_icmps_bmask_notmixed_and(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_and(
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15
+; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 3
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 255
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 243
+; CHECK-NEXT: [[RES:%.*]] = and i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %mask1 = and i32 %A, 15 ; 0x0f
+ %tst1 = icmp ne i32 %mask1, 3 ; 0x03
+ %mask2 = and i32 %A, 255 ; 0xff
+ %tst2 = icmp ne i32 %mask2, 243 ; 0xf3
+ %res = and i1 %tst1, %tst2
+ ret i1 %res
+}
+
+define i1 @masked_icmps_bmask_notmixed_and_contradict_notoptimized(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_and_contradict_notoptimized(
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15
+; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 3
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 255
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 242
+; CHECK-NEXT: [[RES:%.*]] = and i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %mask1 = and i32 %A, 15 ; 0x0f
+ %tst1 = icmp ne i32 %mask1, 3 ; 0x03
+ %mask2 = and i32 %A, 255 ; 0xff
+ %tst2 = icmp ne i32 %mask2, 242 ; 0xf2
+ %res = and i1 %tst1, %tst2
+ ret i1 %res
+}
+
+define i1 @masked_icmps_bmask_notmixed_and_expected_false(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_and_expected_false(
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 255
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 242
+; CHECK-NEXT: ret i1 [[TST2]]
+;
+ %mask1 = and i32 %A, 3 ; 0x0f
+ %tst1 = icmp ne i32 %mask1, 15 ; 0x03
+ %mask2 = and i32 %A, 255 ; 0xff
+ %tst2 = icmp ne i32 %mask2, 242 ; 0xf2
+ %res = and i1 %tst1, %tst2
+ ret i1 %res
+}
+
+define i1 @masked_icmps_bmask_notmixed_not_subset_notoptimized(i32 %A) {
+; CHECK-LABEL: @masked_icmps_bmask_notmixed_not_subset_notoptimized(
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 254
+; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 252
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 253
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 252
+; CHECK-NEXT: [[RES:%.*]] = and i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
+;
+ %mask1 = and i32 %A, 254 ; 0xfe
+ %tst1 = icmp ne i32 %mask1, 252 ; 0xfc
+ %mask2 = and i32 %A, 253 ; 0xfd
+ %tst2 = icmp ne i32 %mask2, 252 ; 0xfc
+ %res = and i1 %tst1, %tst2
+ ret i1 %res
+}
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