[PATCH] D143673: [lld][RISCV][WIP] Implement GP relaxation for R_RISCV_HI20/R_RISCV_LO12_I/R_RISCV_LO12_S.

Thu Feb 9 15:27:43 PST 2023

craig.topper added inline comments.

================
Comment at: llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def:49
 ELF_RELOC(R_RISCV_RVC_LUI,           46)
+ELF_RELOC(R_RISCV_GPREL_I,           47)
+ELF_RELOC(R_RISCV_GPREL_S,           48)
----------------
jrtc27 wrote:
> craig.topper wrote:
> > jrtc27 wrote:
> > > These don't exist, they were removed as they were solely internal to binutils, and their encodings are reserved for future standard use
> > Is binutils only going to be updated to use different values when a new standard use is introduced?
> > 
> > Is there a safe number to use for LLD insternal use?
> So long they're not permitted in inputs it's "fine" as it won't misinterpret future files, but using ELF_RELOC here means all the other tools will think this is a real relocation (e.g. llvm-readelf will decode it). Can you not just use R_RISCV_RELAX like for TLS, though? It seems you're doing the exact same thing.
In order to support .sbss, I believe I need to create a relocation to communicate from the instruction relaxation phase to the `relax` function which runs later. When I tried to rewrite .sbss globals in `relaxHi20Lo12` I got the wrong addresses. My thinking was that I needed the .text section to shrink and the layout of later sections to adjust before I could do the instruction rewriting.

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  https://reviews.llvm.org/D143673/new/

https://reviews.llvm.org/D143673