[PATCH] D143673: [lld][RISCV][WIP] Implement GP relaxation for R_RISCV_HI20/R_RISCV_LO12_I/R_RISCV_LO12_S.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 9 12:32:49 PST 2023
craig.topper created this revision.
craig.topper added reviewers: MaskRay, jrtc27, reames, gkm, PkmX, asb, luismarques.
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Herald added subscribers: pcwang-thead, eopXD.
Herald added a project: LLVM.
This implements support relaxing these relocations to use the GP
register to commute addresses of globals in the .sdata and .sbss
sections.
I have some concern about whether it is safe to look at symbols
in multiple sections during the instruction relaxation phase.
Can the relative distance between __global_pointer and .sbss change
when the .text section shrinks?
I know there is some question about whether GP should exist at all,
so this feature is off by default and must be enabled by passing
--gp-relax to the linker.
No tests yet. This is my first time working in lld so need some time
to learn. The patch has been tested locally on a statically linked
build of SPEC2006 with LTO.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D143673
Files:
lld/ELF/Arch/RISCV.cpp
lld/ELF/Config.h
lld/ELF/Driver.cpp
lld/ELF/Options.td
lld/ELF/Symbols.cpp
lld/ELF/Symbols.h
lld/ELF/Writer.cpp
llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
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