[PATCH] D143471: [X86][MC][NFC] Refine code in X86MCCodeEmitter.cpp about opcode prefix

[Kan Shengchen via Phabricator via llvm-commits]

skan added a comment.

In D143471#4114638 <https://reviews.llvm.org/D143471#4114638>, @skan wrote:

> In D143471#4114625 <https://reviews.llvm.org/D143471#4114625>, @craig.topper wrote:
>
>> Thinking....  What if we took this further and had an "encodable instruction" object that contains the prefix fields and the modrm fields that we build by walking the operands and format once. Then we would only have 1 switch on format instead of the 3 we have now. Then we use that to emit the prefix, the opcode, and the modrm byte.
>
> This sounds good! Let me give a try.

@craig.topper I think it's doable with some space cost. e.g, we need to reserve some bits in "encodable instruction" to represent the "REG", "MOD", "RM" and "SIB" and It's even true when we only would like to `emitPrefix`.
The code change for `encodable instruction` is quite a big and can share some common code of this patch. I suggest we land this first and possibly implement  "encodable instruction" based on it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143471/new/

https://reviews.llvm.org/D143471