[PATCH] D143633: [AMDGPU] Ignore unused bits in VINTERP encoding

[Jay Foad via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb1883aaecb41: [AMDGPU] Ignore unused bits in VINTERP encoding (authored by foad).

Changed prior to commit:
  https://reviews.llvm.org/D143633?vs=496055&id=496062#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143633/new/

https://reviews.llvm.org/D143633

Files:
  llvm/lib/Target/AMDGPU/VINTERPInstructions.td
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt


Index: llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
===================================================================
--- llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
+++ llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
@@ -3,6 +3,10 @@
 # GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}}
 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04
 
+# Check that unused bits in the encoding are ignored.
+# GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}}
+0x00,0x00,0x80,0xcd,0x01,0x05,0x0e,0x1c
+
 # GFX11: v_interp_p10_f32 v1, v10, v20, v30{{$}}
 0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04
 
Index: llvm/lib/Target/AMDGPU/VINTERPInstructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/VINTERPInstructions.td
+++ llvm/lib/Target/AMDGPU/VINTERPInstructions.td
@@ -23,7 +23,6 @@
 
   let Inst{31-26} = 0x33; // VOP3P encoding
   let Inst{25-24} = 0x1; // VINTERP sub-encoding
-  let Inst{23}    = 0; // reserved
 
   let Inst{7-0}   = vdst;
   let Inst{10-8}  = waitexp;


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