[llvm] b1883aa - [AMDGPU] Ignore unused bits in VINTERP encoding

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2023-02-09T10:43:28Z
New Revision: b1883aaecb4191d2f257779c29ab154021b147df

URL: https://github.com/llvm/llvm-project/commit/b1883aaecb4191d2f257779c29ab154021b147df
DIFF: https://github.com/llvm/llvm-project/commit/b1883aaecb4191d2f257779c29ab154021b147df.diff

LOG: [AMDGPU] Ignore unused bits in VINTERP encoding

In the GFX11 VINTERP encoding bits 23, 59 and 60 are unused. Change the
disassembler to ignore these bits.

Differential Revision: https://reviews.llvm.org/D143633

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VINTERPInstructions.td
    llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VINTERPInstructions.td b/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
index 71de20223e9f6..7d03150bf5b11 100644
--- a/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
@@ -23,7 +23,6 @@ class VINTERPe_gfx11 <bits<7> op, VOPProfile P> : Enc64 {
 
   let Inst{31-26} = 0x33; // VOP3P encoding
   let Inst{25-24} = 0x1; // VINTERP sub-encoding
-  let Inst{23}    = 0; // reserved
 
   let Inst{7-0}   = vdst;
   let Inst{10-8}  = waitexp;

diff  --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
index a1532bfe90d6d..a0b098ddbd6da 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
@@ -3,6 +3,10 @@
 # GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}}
 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04
 
+# Check that unused bits in the encoding are ignored.
+# GFX11: v_interp_p10_f32 v0, v1, v2, v3{{$}}
+0x00,0x00,0x80,0xcd,0x01,0x05,0x0e,0x1c
+
 # GFX11: v_interp_p10_f32 v1, v10, v20, v30{{$}}
 0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04