[PATCH] D143471: [X86][MC][NFC] Refine code in X86MCCodeEmitter.cpp about opcode prefix

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:140
+  void setR(const MCInst &MI, unsigned OpNum) {
+    R = MRI.getEncodingValue(MI.getOperand(OpNum).getReg()) >> 3 & 1;
+  }
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I'm not sure if it makes sense to have this class understand MRI and MI. I kind of think it should only receive the register encoding.

Especially when you look at funcions like setRR2 that now end up looking up the encoding twice because it nests calls to setR and setR2.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143471/new/

https://reviews.llvm.org/D143471