[PATCH] D143570: [RISCV][MC] Add support for RV64E

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:499
+                        AssemblerPredicate<(all_of FeatureRVE)>;
 
 def FeatureRelax
----------------
How about this?
```
def IsRVE : Predicate<"Subtarget->isRVE()">,
                        AssemblerPredicate<(all_of FeatureRVE)>;
def IsRV32E : Predicate<"Subtarget->is32RVE()">,
                        AssemblerPredicate<(all_of FeatureRVE, Feature32Bit)>;
def IsRV64E : Predicate<"Subtarget->is64RVE()">,
                       AssemblerPredicate<(all_of FeatureRVE, Feature64Bit)>;
```


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143570/new/

https://reviews.llvm.org/D143570