[PATCH] D143620: [RISCV] Use OS-specific SafeStack ABI for Fuchsia

[Paul Kirth via Phabricator via llvm-commits]

paulkirth accepted this revision.
paulkirth added a comment.
This revision is now accepted and ready to land.

Mostly this is LGTM modulo unrelated formatting. I'll let @jrtc27 decide if there's anything more required for RISCV, but the implementation and testing is consistent w/ ARM and AArch64.



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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:13272
   SDNode *Copy = *N->use_begin();
-  
   if (Copy->getOpcode() == ISD::BITCAST) {
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jrtc27 wrote:
> Leave unrelated functions alone
nit: unrelated


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:13276
   }
-  
   // TODO: Handle additional opcodes in order to support tail-calling libcalls
----------------
ditto.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D143620/new/

https://reviews.llvm.org/D143620