[PATCH] D143406: [MIPS] Asm: Improved diagnostics when a memory operand and unsupported CPU feature are involved

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 7 11:25:53 PST 2023


jrtc27 added a comment.

This makes sense to me, though a lot of targets leave it at its default false value still. Is there a situation where you wouldn't want this?



================
Comment at: llvm/test/MC/Mips/cnmips/invalid.s:28
+    sdc3  $4, 0($5)      # CHECK: :[[@LINE]]:5: error: instruction requires a CPU feature not currently enabled
\ No newline at end of file

----------------
Please fix these


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143406/new/

https://reviews.llvm.org/D143406



More information about the llvm-commits mailing list