[PATCH] D143283: [AArch64][combine]: combine lshr pattern. [WIP]

[hassnaaHamdi via Phabricator via llvm-commits]

hassnaa-arm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/neon-lshr.ll:22
+  ret i8 %trunca
+}
+
----------------
I investigated the generated DAG and the effect of my changes,
I found that my changes affected the DAG.
Here is the DAG just before the step of instruction selection:

```
SelectionDAG has 19 nodes:
  t0: ch,glue = EntryToken
  t2: i32,ch = CopyFromReg t0, Register:i32 %0
  t4: i32,ch = CopyFromReg t0, Register:i32 %1
          t50: i32 = and t2, Constant:i32<254>
        t37: i32 = srl t50, Constant:i64<1>
          t52: i32 = and t4, Constant:i32<254>
        t42: i32 = srl t52, Constant:i64<1>
      t43: i32 = add t37, t42
        t39: i32 = or t2, t4
      t40: i32 = and t39, Constant:i32<1>
    t44: i32 = add t43, t40
  t17: ch,glue = CopyToReg t0, Register:i32 $w0, t44
  t18: ch = AArch64ISD::RET_FLAG t17, Register:i32 $w0, t17:1
```



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  https://reviews.llvm.org/D143283/new/

https://reviews.llvm.org/D143283