[PATCH] D143069: [DAGCombine] Allow DAGCombine to remove dead masked stores

Dinar Temirbulatov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 7 07:24:22 PST 2023


dtemirbulatov added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:11121-11124
+        (!MST->getMemoryVT().isScalableVector() ||
+         MST1->getMemoryVT().isScalableVector()) &&
+        MST->getMemoryVT().getStoreSize().getKnownMinValue() ==
+            MST1->getMemoryVT().getStoreSize().getKnownMinValue()) {
----------------
sdesmalen wrote:
> Can this be replaced by:
> 
>   ElementCount::isKnownLE(MST1->getMemoryVT().getStoreSize(),
>                           MST->getMemoryVT().getStoreSize())
> 
> ?
hmm, I could image somethis like:
  %alltrue.ins = insertelement <vscale x 4 x i1> poison, i1 true, i32 0
  %alltrue = shufflevector  <vscale x 4 x i1> %alltrue.ins,  <vscale x 4 x i1> poison,  <vscale x 4 x i32> zeroinitializer
  call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask)
  call void @llvm.masked.store.nxv4i16(<vscale x 4 x i16> %val1, ptr %a, i32 4, <vscale x 4 x i1> %alltrue)
that ends up with  st1h, probably TypeSize::KnownLE suits better here.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143069/new/

https://reviews.llvm.org/D143069



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