[PATCH] D141924: [IR] Add new intrinsics interleave and deinterleave vectors

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 7 01:28:54 PST 2023


CarolineConcatto updated this revision to Diff 495421.
CarolineConcatto added a comment.

The overloaded type size in the function for the examples in LangRef  and in the test files were with the incorrect. The overloaded type size is showing as the smallest type size in the function. Problem is that there is only  
LLVMHalfElementsVectorType to describe the dependencies between the type sizes.
So the overloaded type size needs to be the biggest type size in the function.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141924/new/

https://reviews.llvm.org/D141924

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
  llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
  llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
  llvm/test/CodeGen/AArch64/sve-vector-interleave.ll

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