[PATCH] D143373: [InstCombine] fold icmp of the sum of ext bool based on limited range

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:5849
+        return BinaryOperator::CreateAnd(Builder.CreateNot(X), Y);
+      if (Pred == ICmpInst::ICMP_NE || Pred == ICmpInst::ICMP_SGT)
+        return BinaryOperator::CreateOr(X, Builder.CreateNot(Y));
----------------
spatel wrote:
> goldstein.w.n wrote:
> > spatel wrote:
> > > Include "ULT" here?
> > > Include "ULT" here?
> > 
> > All corresponding unsigned predicts no?
> We could, but it would probably just be dead code.
> 
> UGT: "x u> -1" is really "x u> 0xffff..." (is always simplified to false).
> SLT: handled by SCCP, but nothing in instcombine gets it, so we should add that to the list too.
> 
> All of ULE/UGE/SLE/SGE will be canonicalized to their LT/GT counterparts, so we don't need to handle those.
Thanks for the mention for the unsigned compare.
ult -1 is the same to ne -1 here.
ugt 1 is the same to eq -1 here.
ugt 0 is the same to ne 0 here.
ult 1 is the same to eq 0 here.



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Comment at: llvm/test/Transforms/InstCombine/icmp-range.ll:662
 
 define i1 @zext_sext_add_icmp_sgt_minus1(i1 %a, i1 %b) {
 ; CHECK-LABEL: @zext_sext_add_icmp_sgt_minus1(
----------------
spatel wrote:
> Where do we transform this pattern? Is it possible that the existing code can be extended to handle more predicates?
It comes from computeKnownBits, sgt -1 can ignore the sign bit to do this. It only works for sgt -1 I think. 


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  https://reviews.llvm.org/D143373/new/

https://reviews.llvm.org/D143373