[PATCH] D143396: [ARM] Perform lane interleaving from reductions.

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs accepted this revision.
samtebbs added a comment.
This revision is now accepted and ready to land.

Looks great, thank you.



================
Comment at: llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp:294
 
-  assert(!Truncs.empty() && "Expected some truncs");
+  assert((!Truncs.empty() || !Reducts.empty()) && "Expected some truncs");
+  if (Truncs.empty() && Exts.empty())
----------------
nit: add reductions to the assertion message.


================
Comment at: llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp:395
 
+static bool isaReduct(Instruction &I) {
+  if (auto *II = dyn_cast<IntrinsicInst>(&I))
----------------
It might be good to add a comment or change the function name to explain that it's checking if the instruction is a reduction for which the lane ordering doesn't matter, just to make the purpose more clear.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143396/new/

https://reviews.llvm.org/D143396