[llvm] 322a2ed - [InstCombine] precommit tests for icmp with bool range; NFC
via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 6 01:16:37 PST 2023
Author: chenglin.bi
Date: 2023-02-06T17:16:30+08:00
New Revision: 322a2ed3557a3cdba9ee459d46bc1fc0c159d850
URL: https://github.com/llvm/llvm-project/commit/322a2ed3557a3cdba9ee459d46bc1fc0c159d850
DIFF: https://github.com/llvm/llvm-project/commit/322a2ed3557a3cdba9ee459d46bc1fc0c159d850.diff
LOG: [InstCombine] precommit tests for icmp with bool range; NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/icmp-range.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/icmp-range.ll b/llvm/test/Transforms/InstCombine/icmp-range.ll
index 537e1c261ee82..99d8e7e3ed157 100644
--- a/llvm/test/Transforms/InstCombine/icmp-range.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-range.ll
@@ -629,6 +629,199 @@ define i1 @ashr_uge_sub(i8 %b, i8 %x, i8 %y) {
ret i1 %r
}
+define i1 @zext_sext_add_icmp_eq_minus1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_eq_minus1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[ADD]], -1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp eq i8 %add, -1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_ne_minus1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_ne_minus1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[ADD]], -1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp ne i8 %add, -1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_sgt_minus1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_sgt_minus1(
+; CHECK-NEXT: [[B_NOT:%.*]] = xor i1 [[B:%.*]], true
+; CHECK-NEXT: [[R:%.*]] = or i1 [[B_NOT]], [[A:%.*]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp sgt i8 %add, -1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_sgt_0(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_sgt_0(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[ADD]], 0
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp sgt i8 %add, 0
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_slt_0(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_slt_0(
+; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[A:%.*]], true
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i1 [[TMP2]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp slt i8 %add, 0
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_eq_1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_eq_1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[ADD]], 1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp eq i8 %add, 1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_ne_1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_ne_1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[ADD]], 1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp ne i8 %add, 1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_slt_1(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_slt_1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[ADD]], 1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp slt i8 %add, 1
+ ret i1 %r
+}
+
+define <2 x i1> @vector_zext_sext_add_icmp_slt_1(<2 x i1> %a, <2 x i1> %b) {
+; CHECK-LABEL: @vector_zext_sext_add_icmp_slt_1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext <2 x i1> [[A:%.*]] to <2 x i8>
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext <2 x i1> [[B:%.*]] to <2 x i8>
+; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i8> [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt <2 x i8> [[ADD]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %zext.a = zext <2 x i1> %a to <2 x i8>
+ %zext.b = sext <2 x i1> %b to <2 x i8>
+ %add = add <2 x i8> %zext.a, %zext.b
+ %r = icmp slt <2 x i8> %add, <i8 1, i8 1>
+ ret <2 x i1> %r
+}
+
+define <2 x i1> @vector_zext_sext_add_icmp_slt_1_poison(<2 x i1> %a, <2 x i1> %b) {
+; CHECK-LABEL: @vector_zext_sext_add_icmp_slt_1_poison(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext <2 x i1> [[A:%.*]] to <2 x i8>
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext <2 x i1> [[B:%.*]] to <2 x i8>
+; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i8> [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt <2 x i8> [[ADD]], <i8 1, i8 poison>
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %zext.a = zext <2 x i1> %a to <2 x i8>
+ %zext.b = sext <2 x i1> %b to <2 x i8>
+ %add = add <2 x i8> %zext.a, %zext.b
+ %r = icmp slt <2 x i8> %add, <i8 1, i8 poison>
+ ret <2 x i1> %r
+}
+
+define i1 @zext_sext_add_icmp_slt_1_no_oneuse(i1 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_slt_1_no_oneuse(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: call void @use(i8 [[ADD]])
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[ADD]], 1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ call void @use(i8 %add)
+ %r = icmp slt i8 %add, 1
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_slt_1_rhs_not_const(i1 %a, i1 %b, i8 %c) {
+; CHECK-LABEL: @zext_sext_add_icmp_slt_1_rhs_not_const(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[ADD]], [[C:%.*]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i1 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp slt i8 %add, %c
+ ret i1 %r
+}
+
+define i1 @zext_sext_add_icmp_slt_1_type_not_i1(i2 %a, i1 %b) {
+; CHECK-LABEL: @zext_sext_add_icmp_slt_1_type_not_i1(
+; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i2 [[A:%.*]] to i8
+; CHECK-NEXT: [[ZEXT_B:%.*]] = sext i1 [[B:%.*]] to i8
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[ZEXT_A]], [[ZEXT_B]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[ADD]], 1
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %zext.a = zext i2 %a to i8
+ %zext.b = sext i1 %b to i8
+ %add = add i8 %zext.a, %zext.b
+ %r = icmp slt i8 %add, 1
+ ret i1 %r
+}
+
!0 = !{i32 1, i32 6}
!1 = !{i32 0, i32 6}
!2 = !{i8 0, i8 1}
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