[PATCH] D143367: [RISCV] Remove DecoderMethod from C_NOP_HINT. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 5 21:33:45 PST 2023
craig.topper created this revision.
craig.topper added reviewers: asb, luismarques, reames, kito-cheng, jrtc27.
Herald added subscribers: luke, VincentWu, vkmr, frasercrmck, evandro, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, shiva0217, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya, arichardson.
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craig.topper requested review of this revision.
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Herald added a project: LLVM.
This doesn't appear to be needed.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D143367
Files:
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoC.td
Index: llvm/lib/Target/RISCV/RISCVInstrInfoC.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -611,7 +611,6 @@
def C_NOP_HINT : RVInst16CI<0b000, 0b01, (outs), (ins simm6nonzero:$imm),
"c.nop", "$imm">, Sched<[WriteNop]> {
let Inst{6-2} = imm{4-0};
- let DecoderMethod = "decodeRVCInstrSImm";
}
def C_ADDI_HINT_IMM_ZERO : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
Index: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
===================================================================
--- llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -353,10 +353,6 @@
uint64_t Address,
const MCDisassembler *Decoder);
-static DecodeStatus decodeRVCInstrSImm(MCInst &Inst, unsigned Insn,
- uint64_t Address,
- const MCDisassembler *Decoder);
-
static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);
@@ -387,17 +383,6 @@
return MCDisassembler::Success;
}
-static DecodeStatus decodeRVCInstrSImm(MCInst &Inst, unsigned Insn,
- uint64_t Address,
- const MCDisassembler *Decoder) {
- uint64_t SImm6 =
- fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
- DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
- (void)Result;
- assert(Result == MCDisassembler::Success && "Invalid immediate");
- return MCDisassembler::Success;
-}
-
static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
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