[PATCH] D143345: [RFC][RISCV] Don't disassemble `addi`s with relocations as `mv`s

[Luís Marques via Phabricator via llvm-commits]

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A RISC-V `mv rd, rs` instruction is an alias/pseudoinstruction for `addi rd, rs, 0`.

When disassembling object files we'll commonly encounter many (arguably) spurious `mv`s: `addi`s with unresolved relocations. The immediate operand isn't actually zero, though that is obscured by the relocation, so IMO it shouldn't be disassembled as a `mv`. I'd argue that even if such a relocation happens to resolve to zero it's still semantically not a `mv`, but that is a minor point.

This patch tries to address that situation by detecting when those `addi`s have relocations and not printing them as `mv`s.

Please let me know if you agree with (1) my reasoning and (2) the overall approach of this patch.
If there is a rough agreement I'll further improve the patch, including optimizing the search for the relocations and not introducing a separate `printInst` method.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143345

Files:
  llvm/include/llvm/MC/MCInstPrinter.h
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
  llvm/test/MC/RISCV/rvi-aliases-valid.s
  llvm/tools/llvm-objdump/llvm-objdump.cpp

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