[PATCH] D143170: [X86][FP16] Lower half->i16 into vcvttph2[u]w directly
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 3 22:34:06 PST 2023
LuoYuanke accepted this revision.
LuoYuanke added a comment.
This revision is now accepted and ready to land.
LGTM.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:22841
+ "Expected f32/f64 vector!");
+ MVT NVT = VT.changeVectorElementType(MVT::i32);
if (IsStrict) {
----------------
Just curious, what does "N" means in NVT?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143170/new/
https://reviews.llvm.org/D143170
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