[PATCH] D143036: [RISCV] Add vendor-defined XTHeadBs (single-bit) extension
Philipp Tomsich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 3 13:09:51 PST 2023
philipp.tomsich added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rv32xtheadbs.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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reames wrote:
> In this diff, you have coverage for both 32 and 64, but is this extension actually defined for RV32? The previous diff (THeadBa) was only tested on RV64. Why are these two handled differently here?
> In this diff, you have coverage for both 32 and 64, but is this extension actually defined for RV32? The previous diff (THeadBa) was only tested on RV64. Why are these two handled differently here?
Test cases to THeadBa have been added in the latest revisison.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143036/new/
https://reviews.llvm.org/D143036
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