[llvm] 9d19bbe - [AArch64][SVE2p1] Add IntrNoMem to int_aarch64_sve_psel intrinsic

David Sherwood via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 3 08:16:58 PST 2023


Author: David Sherwood
Date: 2023-02-03T16:16:47Z
New Revision: 9d19bbe6e0c915c2bbc9603604ddef3e5b3aa7b0

URL: https://github.com/llvm/llvm-project/commit/9d19bbe6e0c915c2bbc9603604ddef3e5b3aa7b0
DIFF: https://github.com/llvm/llvm-project/commit/9d19bbe6e0c915c2bbc9603604ddef3e5b3aa7b0.diff

LOG: [AArch64][SVE2p1] Add IntrNoMem to int_aarch64_sve_psel intrinsic

Differential Revision: https://reviews.llvm.org/D143262

Added: 
    

Modified: 
    llvm/include/llvm/IR/IntrinsicsAArch64.td

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td
index 18604eff71bf..2effdf62c034 100644
--- a/llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -2731,8 +2731,9 @@ let TargetPrefix = "aarch64" in {
 
   def int_aarch64_sve_psel
       : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
-                              [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
-                               LLVMMatchType<0>, llvm_i32_ty]>;
+                              [LLVMMatchType<0>,
+                               LLVMMatchType<0>, llvm_i32_ty],
+                              [IntrNoMem]>;
 
   //
   // Predicate-pair intrinsics


        


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