[PATCH] D143170: [X86][FP16] Lower half->i16 into vcvttph2[u]w directly

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:22836
 
-    if (VT == MVT::v8i16 && (SrcVT == MVT::v8f32 || SrcVT == MVT::v8f64)) {
+    // v8f32/v16f32/v8f64->v8i16/v16i16 need to widden first.
+    if (VT.getVectorElementType() == MVT::i16) {
----------------
widden -> widen


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:22837
+    // v8f32/v16f32/v8f64->v8i16/v16i16 need to widden first.
+    if (VT.getVectorElementType() == MVT::i16) {
+      MVT NVT = VT.changeVectorElementType(MVT::i32);
----------------
We're losing the SrcVT check - either a f32/f64 check back or add an assert? 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143170/new/

https://reviews.llvm.org/D143170